The TACS-RF preprint, submitted on October 22, examines how a language-model agent can operate professional radio-frequency circuit-design tools. Tristan Liang and Aravind Nagulu describe using Claude Opus 4.8 with Cadence, Calibre, and Ansys HFSS. Their example is a 240–251 GHz transmitter designed for a 90-nanometre SiGe BiCMOS process.
The crucial limitation is the type of evidence. The results section describes simulations after parasitic extraction. We do not present the report as measurements from a fabricated silicon chip. Final integration and verification remain among the human designer's responsibilities; fully autonomous text-to-ASIC design is a future vision.
An agent working through verification tools
The approach lets a model modify a design, run calculations, and use their output in the next iteration. In that sense, a language-model response initiates a check rather than constituting proof that the circuit meets its target. The relevant output is an artifact that can be inspected, not merely an explanation that sounds technically convincing.
For complementary context, HFSS is a three-dimensional electromagnetic simulation tool. Its vendor describes analysis of high-frequency structures, including antennas and interactions between electromagnetic fields and geometry. This explains why such a tool belongs in the workflow; it does not independently validate the TACS-RF results.
Our editorial interpretation is that the connection to specialized software makes this example interesting. A textual explanation can be persuasive while overlooking an important constraint. An executable design allows questions to be directed at specific parameters and calculations rather than only at the wording of an answer.
Between simulation and measurement
A simulation result depends on material and device models, geometry, and specified conditions. Our conclusion is not that simulation is unimportant, but that its scope needs to remain explicit. A design meeting one set of conditions has not automatically been validated across every operating regime or future manufacturing circumstance.
In an evaluation, we would request a link from each reported figure to the design version, configuration, and saved tool output. If the agent subsequently modifies the circuit, an earlier number should not remain presented as evidence for the new version. This is a proposed verification criterion, not an allegation that the paper violates it.
Keeping human work visible
A comparison with another approach needs to include preparation, computation, review, and corrections. A fast first schematic does not by itself establish the time to an acceptable design. Similarly, labor savings should not be inferred from a forecast about a future experiment or from comparison with a different kind of task.
A useful next test, in our view, would use a specification and independently checked acceptance conditions established in advance. It should identify which steps the agent performed, which required a person, and which outcomes were simulated. SIExpo has not run the software, reproduced the circuit, or performed laboratory measurements.
TACS-RF provides a concrete example of an AI agent entering an engineering iteration. Its significance lies in the checkable connection between a design and a tool. A completed, manufactured, independently measured chip remains a separate milestone rather than something that should be inferred from a successful design-simulation workflow.
*AI illustration: a conceptual editorial image, not a documentary photograph or an actual product screen.*
*Editorial verification: 2026-10-26T17:41:07.909939+00:00.*
